1. Field of the Invention
The present invention relates to a liquid crystal display unit for displaying an image based on a display control signal showing timings having non-display period. The present invention also relates to a tablet of a liquid crystal integral type in which a display period and a non-display period are formed as timings of a display control signal. More particularly, the present invention relates to a method for detecting coordinates by a detecting pen.
2. Description of the Related Art
There is a device of a liquid crystal display integral type as one kind of device able to display an image by using a liquid crystal and input data by a pen. In this liquid crystal display integral type device, a coordinate detecting period for providing a non-display of the image is formed to detect coordinates by using a detecting pen between frames for performing a liquid crystal displaying operation (see FIG. 5). This non-display period is a period corresponding to a vertical retrace line period in a CRT display. In this period, a scanning voltage for detecting coordinates is sequentially applied to each of display electrodes in an array direction thereof every display electrode at each of X and Y coordinates. The X and Y coordinates are detected from timings in which a voltage is induced by electrostatic induction in the detecting pen coming in contact with a liquid crystal panel.
FIG. 1 is a block diagram showing the electric construction of a liquid crystal display integral type unit in accordance with a general technique.
In this general liquid crystal display unit, column electrodes X1 to Xm and row electrodes Y1 to Yn are arranged in a liquid crystal panel 1. The column electrodes X1 to Xm are operated by a segment driving circuit 3. The row electrodes Y1 to Yn are operated by a common driving circuit 2.
A display control circuit 5 forms a circuit block for generating display data transmitted to the liquid crystal panel 1 and various kinds of timing signals. A display period and a non-display period for detecting coordinates are formed in timings of these timing signals. A position detecting control circuit 6 outputs a pulse for detecting coordinates. One of outputs of these control circuits 5 and 6 is selected by a switching circuit 4 and is outputted from the switching circuit 4 to the segment driving circuit 3 and the common driving circuit 2. A control circuit 7 controls various kinds of timings when coordinates are detected.
A small coordinate detecting signal induced by the detecting pen 8 is amplified by an amplifier 9 and is transmitted to an X-coordinate detecting circuit 10 and a Y-coordinate detecting circuit 11, The X-coordinate detecting circuit 10 and the Y-coordinate detecting circuit 11 respectively transmit an X-coordinate output and a Y-coordinate output based on a counter output from the control circuit 7. A direct current power source circuit 12 supplies power for a liquid crystal display to each of the common driving circuit 2 and the segment driving circuit 3.
A coordinate detecting principle will first be explained before an operation of the general liquid crystal display unit having the above construction is concretely explained.
The coordinate detecting period as a non-display display period is divided into a scanning period of the column electrodes X1 to Xm and a scanning period of the row electrodes Y1 to Yn. As shown in FIG. 2, in each of the scanning periods, a scanning voltage is sequentially applied to the electrodes along an array direction thereof every each of the column electrodes X1 to Xm and the row electrodes Y1 to Yn in timings in which adjacent electrodes partially overlap each other.
FIG. 2 is an explanatory view typically showing these timings. This explanatory view does not strictly correspond to the operation of the general liquid crystal display unit shown in FIG. 1. In the general liquid crystal display unit, the X-coordinate is detected after the Y-coordinate is detected.
An electrode for detecting high impedance is arranged at an end tip of the detecting pen 8. Therefore, when the detecting pen 8 comes in contact with a display face as a detecting panel face, a small capacity is caused between an electrode in the liquid crystal panel and an electrode of the detecting pen 8 as shown in FIG. 3a.
Therefore, when a scanning voltage is applied to the panel electrode, a small voltage is induced by electrostatic induction in the electrode of the detecting pen 8 as shown in FIG. 3b. The induced voltage has a peak at a time point at which the scanning voltage is applied to an electrode located just below the detecting pen 8. Therefore, when the scanning voltage is sequentially applied to the electrodes from an electrode located in an end portion of the liquid crystal panel 1, a position of the detecting pen 8 is detected in timing in which the induced voltage is a peak as shown in FIG. 3c.
FIG. 4 shows timings of main signals in the general liquid crystal display unit. The operation of the general liquid crystal display unit will next be explained with reference to FIG. 4 in accordance with necessity.
In FIG. 4, four upper signals are outputs from the display control circuit 5. A signal S is a signal for determining a starting line of a frame. A signal CP1 is a signal showing synchronization in a row unit. Signals D0 to D3 show parallel data of 4 bits as display data. A signal CP2 is a signal for showing timings for latching the signals D0 to D3 to the segment driving circuit 3.
The number of column electrodes X1 to Xm is set to m as a positive integer and the signals D0 to D3 are constructed by 4 bits. Accordingly, the number of clock signals with respect to the signal CP2 on one line as a row is set to m/4. The number of lines as rows shown by the signal CP1 is set to (n+.alpha.) to secure a period for detecting coordinates by adding the number .alpha. of lines corresponding to the non-display period to the number n of lines indispensable to a display.
In FIG. 4, eight lower signals show signals including signals from the position detecting control circuit 6 and finally transmitted to the common driving circuit 2 and the segment driving circuit 3. A signal MODE is a signal for switching operating modes of the segment driving circuit 3 from a segment operating mode to a common operating mode.
In the segment operating mode, display data on one line are sequentially stored to an internal buffer and these stored display data are transmitted to the liquid crystal panel 1 in synchronization with input timing of a signal XCK shown in FIG. 1 at a stage at which all display data are arranged.
In contrast to this, the common operating mode is a mode for operating a shift register. Namely, while one bit data DI are sequentially shifted in accordance with the signal XCK, data of each of bits of the shift register are simultaneously transmitted to the liquid crystal panel 1 as parallel data.
As explained above, the segment driving circuit 3 is constructed such that the above two operating modes are executed because it is necessary to simultaneously transmit data on one line to the liquid crystal panel 1 so as to display an image and it is necessary to shift data from each other to detect coordinates. The signal MODE shown in FIG. 4 indicates the segment operating mode when this signal MODE shows a low voltage level (L level). In contrast to this, the signal MODE indicates the common operating mode when this signal MODE shows a high voltage level (H level).
A signal SY is a signal showing beginning of a frame in the display period and is equal to the signal S. A signal CP1Y is a shift clock signal for the common driving circuit 2 and is equal to the signal CP1 in the display period. A terminal SX is connected to an input terminal DI for the common operating mode of the segment driving circuit 3 shown in FIG. 1. No voltage of a signal SX at this terminal SX is changed from a low voltage level during the display period.
A signal Dout shows parallel data of 4 bits for a display and is basically equal to each of the signals D0 to D3 during the display period. However, a voltage level of this signal Dout is changed to a low voltage level so as to clear internal data within the segment driving circuit 3 when data are transmitted on a (n+1)-th line. A signal CP20 is a clock signal for latching the signal Dout and is equal to the signal CP2 in the display period.
From the above explanation, an image is displayed on the liquid crystal panel 1 during the display period in accordance with timings of various kinds of signals mentioned above.
An operation of the liquid crystal display unit in the coordinate detecting period will next be explained.
In a period for detecting a Y-coordinate, the voltage level of a signal SY transmitted to the common driving circuit 2 is set to a high voltage level. A clock signal is transmitted to a signal CP1Y in the same timing as the signal SY at this high voltage level.
At this time, the clock signal transmitted to the signal CP1Y is set to a clock signal having a maximum frequency within an allowable range of the operation of the common driving circuit 2. Further, the number of clock signals transmitted for the signal CP1Y is set to a clock number provided by adding a value n showing the number of lines as rows of the row electrodes Y1 to Yn to the number of clock signals transmitted during a period providing the high voltage level of the signal SY, and further adding one to this added number. A width of the signal SY at its high voltage level is determined by the number of electrodes for overlapping pulses for scanning with each other when coordinates are detected.
In contrast to this, in a period for detecting an X-coordinate, the voltage level of a signal MODE is set to a high voltage level and the operation of the segment driving circuit 3 is changed from the segment operating mode to the common operating mode. At this time, a signal SX shows input data of a shift register of the segment driving circuit 3. Further, a signal CP1X is set to a shift clock signal.
Namely, the operation of the liquid crystal display unit in the detecting period of the X-coordinate is similar to that in detecting period of the Y-coordinate. In this case, the signal SY is replaced with the signal SX and the signal CP1Y is replaced with the signal CP1X. Therefore, the number of clock signals for the signal CP1X is set to a clock number provided by adding a value m showing the number of columns of the column electrodes X1 to Xm to the number of clock signals transmitted during a period providing a high voltage level of the signal SX, and further adding one to this added number. A width of the signal SX at its high voltage level is determined by the number of electrodes for overlapping pulses for scanning with each other when coordinates are detected.
The voltage level of a signal FR for determining alternating timings of a voltage applied to the liquid crystal panel 1 is fixed in the above coordinate detecting periods. In FIG. 4, this voltage level of the signal FR is set to a low voltage level, but may be set to a high voltage level. Namely, the voltage level of the signal FR may be fixedly set to one of the low and high voltage levels. This is because, when a scanning pulse for the coordinate detection is changed to an alternating pulse during a scanning operation, a change in voltage of this pulse causes noises and reduces an accuracy in the coordinate detection.
The scanning pulse for the coordinate detection is applied to each of the row electrodes Y1 to Yn and the column electrodes X1 to Xm by each of the above-mentioned signals. The detecting pen 8 detects a small voltage caused by this scanning pulse. Each of X and Y coordinates is detected by the X-coordinate detecting circuit 10 and the Y-coordinate detecting circuit 11.
The above liquid crystal display unit in accordance with the general technique is a display unit having both a display function and a coordinate detecting function. There is another display unit using a liquid crystal panel which has a display function, but has no coordinate detecting function.
In this display unit, the switching circuit 4, the position detecting control circuit 8, the X-coordinate detecting circuit 10 and the Y-coordinate detecting circuit 11 are removed from the construction of the liquid crystal display unit shown in FIG. 1. The liquid crystal panel 1 has characteristics in which a better display can be obtained as a duty ratio is reduced. Therefore, all times of one frame are occupied by a scanning period for displaying an image. Namely, no detecting period shown in FIG. 5 is formed in this display unit. Accordingly, when a display period of one frame is terminated, a display period of the next frame is immediately started. Further, the segment driving circuit 3 has only a segment operating mode. The display control circuit 5 generates a control signal set in only the display period.
It is necessary to set a coordinate detecting period in the above display unit having no coordinate detecting function when the coordinate detecting function is added to this display unit. Therefore, it is necessary to change the construction of the existing display control circuit 5 for generating the control signal set in only the display period. Namely, no coordinate detecting function can be added to this display unit by only adding another circuit block to this display unit. Therefore, it is necessary to greatly change the display control circuit and change a transmitting speed of data for a display so that no existing construction of the display control circuit can be used as it is.
In contrast to this, when the liquid crystal display unit has the coordinate detecting function, the number of periods for detecting coordinates is set to one within one frame. A frame frequency is set to about 60 Hz to 80 Hz. Therefore, the coordinates are detected about 60 to 80 times for one second. Accordingly, when the detecting pen 8 is moved at a high speed, no moving locus of the detecting pen 8 is continuously detected so that problems are caused in a character input, etc.